[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"news-slug-amd-taalas-hardwired-inference-aug-2026":3,"news-related-c07c67b6-6a48-4780-88bd-bc46b628c546":41},{"id":4,"title":5,"summary":6,"content":7,"original_url":8,"source_id":9,"tags":10,"translations":27,"news_slug":34,"published_at":35,"created_at":36,"modified_at":37,"is_published":38,"publish_type":39,"image_url":14,"view_count":40},"c07c67b6-6a48-4780-88bd-bc46b628c546","AMD 吃下 Taalas:把模型权重永久刻进芯片的\"硬推理\"赌局","2026 年 8 月 6 日,AMD 宣布收购多伦多初创公司 Taalas。Taalas 把模型权重直接烧进晶体管,声称 HC1 测试芯片跑 Llama 3.1 8B 时每秒可达约 17,000 tokens,推理功耗约为英伟达 H200 的十分之一。AMD 计划把这套\"硬编码推理\"技术与 Instinct GPU、Helios 机架深度整合,在 decode 阶段用 Taalas 替代 GPU,绕过 HBM 带宽瓶颈。","# AMD 吃下 Taalas:把模型权重永久刻进芯片的\"硬推理\"赌局\n\n2026 年 8 月 6 日美股收盘后,AMD(纳斯达克:AMD)宣布已与多伦多 AI 芯片初创公司 Taalas 达成最终收购协议。Taalas 成立于 2023 年,做的是一种极端的\"专用推理芯片\":把特定 AI 模型的权重永久烧进晶体管,跑 inference 时不再从 HBM\u002FDRAM 里读权重,从根本上绕开 LLM 推理的内存墙。交易预计 2026 年第四季度交割,需通过监管审批,具体金额未披露 (来源:[AMD 投资者关系新闻稿](https:\u002F\u002Fir.amd.com\u002Fnews-events\u002Fpress-releases\u002Fdetail\u002F1296\u002Famd-acquires-taalas-to-advance-compute-solutions-for-rapidly-growing-ai-inference-market))。\n\n## 为什么 GPU 不是 inference 的最优解\n\nLLM 在生成 token 时是自回归的——每个 token 都要把整张权重表从显存搬到计算单元。对 700 亿参数的 16-bit 模型来说,单步前向约需读取 140 GB 数据。即使是 H100 配的 HBM 3.35 TB\u002Fs 峰值带宽,光读权重就要大约 42 毫秒,这是纯由内存速度决定的硬地板,再翻倍的 FLOPS 也压不下去。AMD 自家 7 月量产的 Helios 机架用 HBM4 把 MI455X 的带宽推到 19.6 TB\u002Fs,把这条地板往下推,但仍是 DRAM,每个 token 仍要重读一遍 (来源:[TechTimes — AMD Buys Taalas to Hardwire AI Models Into Silicon](https:\u002F\u002Fwww.techtimes.com\u002Farticles\u002F323482\u002F20260807\u002Famd-buys-taalas-hardwire-ai-models-silicon-bypassing-gpu-memory-wall.htm))。\n\n## Taalas 的解法:把权重做成电路\n\nTaalas 把方案叫 Hard Coded Inference。第一代芯片 HC1 是 815 mm² 的大尺寸 die,TSMC 6nm 工艺,集成了约 530 亿晶体管,把 Meta 的 Llama 3.1 8B 整张权重表烧进 mask-ROM 区域。CEO Ljubisa Bajic 在 The Next Platform 的采访中说过核心创新:在单个晶体管内完成 4-bit 权重的存储与对应乘法运算——数存的地方就是算的地方,DRAM 不再介入前向计算。一小块 SRAM 用来放 KV cache、LoRA 适配器和上下文窗口,这一部分可以运行时变更 (来源:[explainx.ai — AMD Buys Taalas: 16,960 Tok\u002FSec Chip Explained](https:\u002F\u002Fwww.explainx.ai\u002Fblog\u002Famd-taalas-acquisition-etched-silicon-chip-august-2026))。\n\nTaalas 自报的 2 月份数据是:HC1 跑 Llama 3.1 8B 时每秒约 17,000 tokens,比英伟达 GPU 快约 48 倍,比 Cerebras 加速器快约 8.5 倍,功耗约 200–250 W,风冷即可。这些数字是 Taalas 自己的口径,The Register 与 SiliconANGLE 的复述与之一致,但都属于厂商宣称、未经独立审计。Solidot 上也有 HN 网友实测 chatjimmy.ai 真实硬件跑出 14,000–17,000 tokens\u002F秒的范围,可以作为外部一致性参照 (来源:[Solidot 转载 The Register 报道](https:\u002F\u002Fwww.solidot.org\u002Fstory?sid=85035))。\n\n## AMD 的接入方式:disaggregated prefill\u002Fdecode\n\nAMD 不想用 Taalas 直接替代 Instinct GPU,而是按推理阶段拆开用——prefill(处理 prompt,计算密集)交给 Instinct GPU,decode(逐 token 生成,内存带宽密集)交给 Taalas。这种拆分对应 Helios 机架的整体架构,与此前 AMD 跟 Anthropic 谈的 2 GW MI450 部署属于同一思路,把硬件按瓶颈类型分别匹配到对应的工作负载上 (来源:[AMD 新闻稿](https:\u002F\u002Fir.amd.com\u002Fnews-events\u002Fpress-releases\u002Fdetail\u002F1296\u002Famd-acquires-taalas-to-advance-compute-solutions-for-rapidly-growing-ai-inference-market))。\n\nAMD AI 业务 SVP Vamsi Boppana 把这桩收购的定位说得很直白:\"AMD 正在构建全栈 AI 平台,让客户能为每种 AI 工作负载灵活选择最合适的算力。\"——把\"灵活\"放在最前面,等同于承认 GPU 不是唯一答案 (来源:同上新闻稿)。\n\n## 为什么不是\"GPU killer\"\n\n把模型权重刻进硅里有三个明显代价:\n\n1. **模型锁定**:权重一旦刻进去,这块 die 就只能跑那个模型。改一个 base 模型要重新流片——Taalas 自称靠结构化 ASIC 只换顶层 2 层金属可以把周期压到约 2 个月,但这仍是硬件级变更,不是 GPU 那种\"下载新 checkpoint 就能跑\"的灵活度 (来源:[TechTimes — AMD Buys Taalas](https:\u002F\u002Fwww.techtimes.com\u002Farticles\u002F323482\u002F20260807\u002Famd-buys-taalas-hardwire-ai-models-silicon-bypassing-gpu-memory-wall.htm))。\n2. **量化精度低**:HC1 用的是 Taalas 自研 3-bit 格式,跟 GPU 上 16\u002F8-bit 推理相比在复杂任务上会有可见质量损失。下一代 HC2(预计 2026 年底到 2027 年初)换 MXFP4 4-bit 浮点,目标单芯片 200 亿参数。\n3. **可修补性差**:如果模型刻进去之后被曝出越狱或 prompt injection 漏洞,没法用软件补丁修,只能重新流片。\n\n## 行业脉络:Nvidia 早就动过同样的心思\n\n这不是 AMD 第一次被推上这条路。2025 年 12 月,英伟达据报以约 200 亿美元拿下 Groq 的技术授权,把 Groq 3 LPU 在 2026 年 3 月 GTC 上正式商用化。Groq LPU 用片上大块 SRAM 缩短存算距离但保留可编程性,Taalas 直接把距离抹零。两条路技术不同,但都在朝\"专用推理硅\"挤——英伟达在 2025 年底、AMD 在 2026 年中,不到一年里两个 GPU 巨头同时对专用 inference 押注,是 GPU 通用性不足以覆盖部署阶段的明确信号 (来源:[TechTimes 同篇报道](https:\u002F\u002Fwww.techtimes.com\u002Farticles\u002F323482\u002F20260807\u002Famd-buys-taalas-hardwire-ai-models-silicon-bypassing-gpu-memory-wall.htm))。\n\n## 我的判断:这是 2027 年 inference 成本曲线的一次试压\n\n收购落地不是终点。HC1 还是技术 demo,工程化问题(大 die 良率、2 个月 tape-out 的承诺能否兑现、HC2 多芯片互联是否真能保留单 die 的每瓦性能)都没在量产规模上验证。AMD 9 个月内已经连下三笔 inference 棋(MK1 inference 软件、Mext 内存优化、Taalas 硬编码硅),打法很清楚:GPU 守住训练和实验侧的灵活性,专用硅去拿下生产部署侧的 token 成本。\n\n如果 HC2 在 2027 年初顺利拿出、并且 tape-out 周期真的压在两个月,模型团队就能把\"先在 Instinct 上验证、生产稳定的版本再烧到 Taalas 上\"这条流水线跑起来——这对 test-time scaling(让模型生成更多推理 token 提升质量)的成本结构会是显著利好。**反过来**,如果 2 个月 tape-out 的承诺经不起量产考验,那 Taalas 的故事就只是一次漂亮的 demo,AMD 这笔钱就当买了张 inference 路线入场券。\n\n所以这件事的真正看点不是\"AMD 买了什么\",而是**2027 年 Q1 之前能不能拿出一个跑在 Helios 里、能服务真实生产负载的 Taalas 加速卡**。在那之前,业界共识仍会停在\"GPU + 内存墙\"框架里,不会有什么根本动摇。","https:\u002F\u002Fwww.techtimes.com\u002Farticles\u002F323482\u002F20260807\u002Famd-buys-taalas-hardwire-ai-models-silicon-bypassing-gpu-memory-wall.htm","4f2dc39f-0b6a-48e6-ad47-da9c3c15cbea",[11,15,18,21,24],{"id":12,"name":13,"slug":13,"description":14,"color":14},"fca9258a-9430-455a-b95d-b9fae5e373a8","ai-inference",null,{"id":16,"name":17,"slug":17,"description":14,"color":14},"40269b40-7942-4650-9672-ed2e6524d37a","ai-technology",{"id":19,"name":20,"slug":20,"description":14,"color":14},"0ef8513a-0a26-42f0-b6f9-5b6dadded45c","efficiency",{"id":22,"name":23,"slug":23,"description":14,"color":14},"e0d31e94-ce47-4c8f-831c-d3d2926d42f3","hardware",{"id":25,"name":26,"slug":26,"description":14,"color":14},"0a93ec8e-ea39-4693-81de-563ca8c173f7","inference",[28],{"id":29,"lang":30,"title":31,"summary":32,"content":33},"d1cc78eb-f0fa-44c0-b945-f44defce5b23","en","AMD acquires Taalas: baking model weights directly into silicon","On August 6, 2026, AMD announced an acquisition of Toronto-based startup Taalas. Taalas hardcodes model weights directly into transistors, claiming its HC1 test chip delivers roughly 17,000 tokens per second on Llama 3.1 8B at approximately one-tenth the power draw of an Nvidia H200. AMD plans to integrate this \"hardcoded inference\" approach with Instinct GPUs and the Helios rack-scale platform, using Taalas silicon for the decode stage to bypass the HBM bandwidth ceiling.","# AMD Buys Taalas: The \"Hard Inference\" Bet on Baking Model Weights Into Silicon\n\nAfter US market close on August 6, 2026, AMD (NASDAQ: AMD) announced a definitive agreement to acquire Toronto AI-chip startup Taalas. Founded in 2023, Taalas builds an extreme form of inference silicon: model weights are permanently burned into transistors, so generation no longer requires streaming weights out of HBM or DRAM. The architecture eliminates, at the source, the memory wall that constrains every GPU-based LLM inference deployment. The deal is expected to close in Q4 2026 subject to regulatory approval; financial terms were not disclosed (source: [AMD investor relations press release](https:\u002F\u002Fir.amd.com\u002Fnews-events\u002Fpress-releases\u002Fdetail\u002F1296\u002Famd-acquires-taalas-to-advance-compute-solutions-for-rapidly-growing-ai-inference-market)).\n\n## Why GPUs Are Not the Optimal Inference Engine\n\nLLM generation is autoregressive. Every token requires a full forward pass, which means reading the entire weight matrix out of video memory into compute units. For a 70-billion-parameter model at standard 16-bit precision, that is roughly 140 GB of data per token. On an H100 with 3.35 TB\u002Fs HBM, the read alone takes about 42 ms — a hard floor set by memory speed, not arithmetic. Doubling FLOPS does not lower it. AMD's own Helios rack, in mass production since July, uses HBM4 to push MI455X bandwidth to 19.6 TB\u002Fs, which narrows the gap but does not close it: HBM4 is still DRAM, still reloaded on every forward pass (source: [TechTimes — AMD Buys Taalas to Hardwire AI Models Into Silicon](https:\u002F\u002Fwww.techtimes.com\u002Farticles\u002F323482\u002F20260807\u002Famd-buys-taalas-hardwire-ai-models-silicon-bypassing-gpu-memory-wall.htm)).\n\n## Taalas's Answer: Make the Weights the Circuit\n\nTaalas calls the approach Hard Coded Inference. The first chip, HC1, is an 815 mm² die on TSMC 6nm, packing roughly 53 billion transistors. The full weight matrix of Meta's Llama 3.1 8B is burned into a mask-ROM \"recall fabric\" — write-once silicon where each weight is a permanent feature of the chip's physical structure. A small SRAM region handles the KV cache, LoRA adapters, and the configurable context window; this portion can change at runtime (source: [explainx.ai — AMD Buys Taalas: 16,960 Tok\u002FSec Chip Explained](https:\u002F\u002Fwww.explainx.ai\u002Fblog\u002Famd-taalas-acquisition-etched-silicon-chip-august-2026)).\n\nThe core innovation, as CEO Ljubisa Bajic explained to The Next Platform, is the ability to store a 4-bit weight and perform the associated multiply inside a single transistor. The number's storage location and the arithmetic that uses it collapse into the same place. There is no DRAM round-trip on the forward pass.\n\nTaalas's own February 2026 numbers: HC1 delivers roughly 17,000 tokens per second on Llama 3.1 8B, about 48× faster than Nvidia GPUs and 8.5× faster than Cerebras accelerators, at roughly 200–250 W draw, air-cooled, no liquid loop. These are vendor figures, repeated by The Register and SiliconANGLE but not independently audited. Hacker News users running real Taalas hardware through chatjimmy.ai reported 14,000–17,000 tokens\u002Fsecond, which is consistent with Taalas's claim (source: [Solidot reprint of The Register reporting](https:\u002F\u002Fwww.solidot.org\u002Fstory?sid=85035)).\n\n## How AMD Plugs It In: Disaggregated Prefill \u002F Decode\n\nAMD's plan is not to replace Instinct GPUs but to split the inference pipeline by phase. Prefill — processing the user's prompt, compute-intensive — stays on Instinct. Decode — generating each output token, memory-bandwidth-bound — runs on Taalas silicon. The split lines up naturally with Helios's existing architecture and with the broader 2 GW MI450 deployment AMD has been building toward with Anthropic: each phase of inference runs on hardware matched to its bottleneck (source: [AMD press release](https:\u002F\u002Fir.amd.com\u002Fnews-events\u002Fpress-releases\u002Fdetail\u002F1296\u002Famd-acquires-taalas-to-advance-compute-solutions-for-rapidly-growing-ai-inference-market)).\n\nAMD AI Group SVP Vamsi Boppana framed the deal in terms of customer choice: \"AMD is building a full-stack AI platform that gives customers the flexibility to deploy the right compute solutions for every AI workload.\" Putting \"flexibility\" first is, in effect, an admission that the GPU is no longer the only answer.\n\n## Why This Is Not a GPU Killer\n\nBaking weights into silicon has three obvious costs:\n\n1. **Model lock-in.** Once the weights are etched, that die runs that model only. Switching to a different base model means a new chip. Taalas claims a structured-ASIC flow that changes only the top two of roughly 100 fabrication layers, compressing the cycle to about two months. That is still a hardware-level change, not the GPU's \"download a new checkpoint and serve it\" flexibility (source: [TechTimes — AMD Buys Taalas](https:\u002F\u002Fwww.techtimes.com\u002Farticles\u002F323482\u002F20260807\u002Famd-buys-taalas-hardwire-ai-models-silicon-bypassing-gpu-memory-wall.htm)).\n2. **Quantization limits.** HC1 uses a proprietary 3-bit format, with acknowledged output-quality degradation on harder tasks versus 16\u002F8-bit GPU inference. The next-generation HC2 (winter 2026 to early 2027) shifts to standard MXFP4 4-bit floating point and targets roughly 20 billion parameters per chip.\n3. **No patchability.** If a jailbreak or prompt-injection vulnerability is discovered after a model is etched in silicon, there is no software patch to ship — the bug is part of the hardware you already deployed.\n\n## The Industry Pattern: Nvidia Already Walked This Path\n\nThis is not the first time AMD has been pushed down this road. In December 2025, Nvidia reportedly paid around $20 billion to license Groq's technology and shipped Groq 3 LPU at GTC in March 2026. Groq's LPU uses large on-chip SRAM banks to shorten the memory-compute distance while preserving programmability; Taalas goes further and removes the distance entirely. The two architectures diverge, but both GPU incumbents — Nvidia at the end of 2025, AMD in mid-2026 — converged on dedicated inference silicon inside a single year. That convergence is the clearest signal yet that general-purpose GPUs do not cover the deployment stage of the AI lifecycle efficiently (source: [TechTimes — same article](https:\u002F\u002Fwww.techtimes.com\u002Farticles\u002F323482\u002F20260807\u002Famd-buys-taalas-hardwire-ai-models-silicon-bypassing-gpu-memory-wall.htm)).\n\n## My Read: A Stress Test on the 2027 Inference Cost Curve\n\nClosing the deal is not the end of the story. HC1 remains a technology demonstrator. The engineering questions — large-die yield, whether the two-month tape-out claim holds at volume, whether HC2's multi-chip interconnect preserves the per-watt performance of a single-die 8B — have not been validated at production scale. AMD has now placed three inference bets in nine months: MK1 (inference software), Mext (memory optimization), and Taalas (hardcoded silicon). The strategy is legible: GPUs keep training and experimental flexibility, while dedicated silicon takes the per-token cost out of production-scale deployment.\n\nIf HC2 ships in early 2027 and the two-month tape-out cycle holds, model teams can plausibly run a \"validate on Instinct, then etch the stable production version onto Taalas\" pipeline. That would meaningfully improve the cost structure for test-time scaling — letting models generate more reasoning tokens without blowing latency or per-query budgets. **Conversely**, if the two-month tape-out claim does not survive production pressure, Taalas becomes a well-publicized demo and AMD is paying for an inference-roadway entry ticket rather than a product.\n\nSo the real question is not \"what did AMD buy\" but **whether AMD can field a Taalas accelerator card running inside a Helios rack against real production workloads before Q1 2027.** Until that happens, the industry consensus stays inside the \"GPU plus memory wall\" frame and nothing fundamental shifts.","amd-taalas-hardwired-inference-aug-2026","2026-08-08T12:00:00Z","2026-08-08T12:04:01.138679Z","2026-08-08T12:04:01.138693Z",true,"agent",230,{"items":42},[43,48,53,58,63,68],{"id":44,"title":45,"news_slug":46,"published_at":47},"45375854-7739-4dd1-bc6a-30db4474652a","Taalas HC2:把单片参数拉到 200 亿,「模型刻进硅片」的第二章","taalas-hc2-20b-mxfp4-50-chips-1t-amd","2026-08-19T00:00:00+00:00",{"id":49,"title":50,"news_slug":51,"published_at":52},"1e553217-9229-4e0c-97e8-9ef8dedb5561","HC1 跑 16,960 tokens\u002F秒的背后:Taalas 把模型烧进硅片的架构账本","taalas-hc1-16960-tokens-architecture","2026-08-13T03:00:00+00:00",{"id":54,"title":55,"news_slug":56,"published_at":57},"dfdc3216-52aa-4a78-9bf5-859affc37d17","AMD 收下 Taalas：把模型权重刻进芯片，推理的内存墙还剩多少？","amd-acquires-taalas-msic-etched-weights","2026-08-11T02:00:00+00:00",{"id":59,"title":60,"news_slug":61,"published_at":62},"2434bbc6-4fda-4750-a02d-dd3ca1fe8933","AMD 收购 Taalas:把模型权重刻进芯片,押注推理硬件的\"硬核\"路线","amd-acquires-taalas-hardcore-inference-silicon","2026-08-08T04:00:00+00:00",{"id":64,"title":65,"news_slug":66,"published_at":67},"4f957b38-d8f5-446f-805c-062ff268d7ab","三星 GAIA 试水 AI PC：把「存算一体」塞进 NPU，准备用 PIM 抢端侧推理","samsung-gaia-ai-pc-pim","2026-07-11T06:00:00+00:00",{"id":69,"title":70,"news_slug":71,"published_at":72},"9dffd6b9-99bc-448c-90d8-f706b74edcba","Intel Xeon 6+ 登场：288核 E-core 架构能否重塑数据中心推理？","intel-xeon-6-plus-288-e-core-clearwater","2026-06-03T01:00:00+00:00"]