Qualcomm has, for the first time, "carried" its data-center AI-chip technology over to the phone track. On June 27, Qualcomm EVP Durga Malladi revealed that the data-center chip technology the company announced this week will be brought down to smartphones in the next few years, with the core being the 3D-stacked High-Bandwidth Computing (HBC) architecture — putting memory and compute units close together, bypassing the old "external memory, bus bottleneck" problem of traditional SoCs.
HBC is not a new concept: AMD, SK Hynix, and others are all working on it. Qualcomm's "data-center first, mobile back-feed" matters a great deal in the LLM inference era: on-device large models start at 7B/13B, and once KV Cache stretches, you hit the DRAM-bandwidth ceiling — token generation visibly "stutters." HBC uses HBM-class stacked packaging to push memory bandwidth into the phone SoC, in theory multiplying tokens/s by several times — good news for on-device Agents, real-time voice, and long-context scenarios.
On the timeline, the first HBC data-center product arrives next year, with phone-side commercialization expected in 2028; Qualcomm is already in talks with phone, PC, and car OEMs in parallel. On-device AI is already the centerpiece of iOS 27, Android 16, and Hongmeng, and Qualcomm is playing the HBC card publicly — in essence declaring that the bottleneck of mobile LLMs is moving from "the model" to "memory and bandwidth." In the second half, hardware has the final say.